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ËHJýÒspdifdptxapbcore\¸ ãdisabledportsport+endpoint@0¶É8:§endpoint@1¶É9:¡interrupt-controller@fee00000 arm,gic-v3F+Ä9P¶þàþð ÿðÿñÿòê :interrupt-controller@fee20000arm,gic-v3-itsÙè¶þâ:ppi-partitionsinterrupt-partition-0ó:interrupt-partition-1ó:saradc@ff100000rockchip,rk3399-saradc¶ÿê>üÛPe×saradcapb_pclkËÔ Òsaradc-apbãokayi2c@ff110000rockchip,rk3399-i2c¶ÿtA‡ ëÂÛAU ×i2cpclkê;ûdefaultñ:+ãokay,1codec@11everest,es8316¶ÛY×mclk¸ñ;<ûdefault =êportendpointÉ>:ši2c@ff120000rockchip,rk3399-i2c¶ÿtB‡ ëÂÛBV ×i2cpclkê#ûdefaultñ?+ ãdisabledi2c@ff130000rockchip,rk3399-i2c¶ÿtC‡ ëÂÛCW ×i2cpclkê"ûdefaultñ@+ãokayÂ1:°i2c@ff140000rockchip,rk3399-i2c¶ÿtD‡ ëÂÛDX ×i2cpclkê&ûdefaultñA+ ãdisabledi2c@ff150000rockchip,rk3399-i2c¶ÿtE‡ ëÂÛEY ×i2cpclkê%ûdefaultñB+ ãdisabledi2c@ff160000rockchip,rk3399-i2c¶ÿtF‡ ëÂÛFZ ×i2cpclkê$ûdefaultñC+ ãdisabledserial@ff180000&rockchip,rk3399-uartsnps,dw-apb-uart¶ÿÛQ`×baudclkapb_pclkêcISûdefault ñDEF ãdisabledserial@ff190000&rockchip,rk3399-uartsnps,dw-apb-uart¶ÿÛRa×baudclkapb_pclkêbISûdefaultñG ãdisabledserial@ff1a0000&rockchip,rk3399-uartsnps,dw-apb-uart¶ÿÛSb×baudclkapb_pclkêdISûdefaultñHãokayserial@ff1b0000&rockchip,rk3399-uartsnps,dw-apb-uart¶ÿÛTc×baudclkapb_pclkêeISûdefaultñI ãdisabledspi@ff1c0000(rockchip,rk3399-spirockchip,rk3066-spi¶ÿÛG[×spiclkapb_pclkêD`J J etxrxûdefaultñKLMN+ ãdisabledspi@ff1d0000(rockchip,rk3399-spirockchip,rk3066-spi¶ÿÛH\×spiclkapb_pclkê5`J J etxrxûdefaultñOPQR+ ãdisabledspi@ff1e0000(rockchip,rk3399-spirockchip,rk3066-spi¶ÿÛI]×spiclkapb_pclkê4`JJetxrxûdefaultñSTUV+ ãdisabledspi@ff1f0000(rockchip,rk3399-spirockchip,rk3066-spi¶ÿÛJ^×spiclkapb_pclkêC`JJetxrxûdefaultñWXYZ+ ãdisabledspi@ff200000(rockchip,rk3399-spirockchip,rk3066-spi¶ÿ ÛK_×spiclkapb_pclkê„`[[ etxrxûdefaultñ\]^_N+ ãdisabledthermal-zonescpu-thermalod…è“`tripscpu_alert0£p¯Ð±passive:acpu_alert1£$ø¯Ð±passive:bcpu_crit£s¯Ð ±criticalcooling-mapsmap0ºa¿ÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿmap1ºbH¿ÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿgpu-thermalod…è“`tripsgpu_alert0£$ø¯Ð±passive:cgpu_crit£s¯Ð ±criticalcooling-mapsmap0ºc ¿dÿÿÿÿÿÿÿÿtsadc@ff260000rockchip,rk3399-tsadc¶ÿ&êatO‡ q°ÛOd×tsadcapb_pclkËè Òtsadc-apb\Îsûinitdefaultsleepñeåfïeùãokay&:`qos@ffa58000rockchip,rk3399-qossyscon¶ÿ¥€ :nqos@ffa5c000rockchip,rk3399-qossyscon¶ÿ¥À :oqos@ffa60080rockchip,rk3399-qossyscon¶ÿ¦€ qos@ffa60100rockchip,rk3399-qossyscon¶ÿ¦ qos@ffa60180rockchip,rk3399-qossyscon¶ÿ¦€ qos@ffa70000rockchip,rk3399-qossyscon¶ÿ§ :rqos@ffa70080rockchip,rk3399-qossyscon¶ÿ§€ :sqos@ffa74000rockchip,rk3399-qossyscon¶ÿ§@ :pqos@ffa76000rockchip,rk3399-qossyscon¶ÿ§` :qqos@ffa90000rockchip,rk3399-qossyscon¶ÿ© :tqos@ffa98000rockchip,rk3399-qossyscon¶ÿ©€ :gqos@ffaa0000rockchip,rk3399-qossyscon¶ÿª :uqos@ffaa0080rockchip,rk3399-qossyscon¶ÿª€ :vqos@ffaa8000rockchip,rk3399-qossyscon¶ÿª€ :wqos@ffaa8080rockchip,rk3399-qossyscon¶ÿª€€ :xqos@ffab0000rockchip,rk3399-qossyscon¶ÿ« :hqos@ffab0080rockchip,rk3399-qossyscon¶ÿ«€ :iqos@ffab8000rockchip,rk3399-qossyscon¶ÿ«€ :jqos@ffac0000rockchip,rk3399-qossyscon¶ÿ¬ :kqos@ffac0080rockchip,rk3399-qossyscon¶ÿ¬€ :lqos@ffac8000rockchip,rk3399-qossyscon¶ÿ¬€ :yqos@ffac8080rockchip,rk3399-qossyscon¶ÿ¬€€ :zqos@ffad0000rockchip,rk3399-qossyscon¶ÿ­ :{qos@ffad8080rockchip,rk3399-qossyscon¶ÿ­€€ qos@ffae0000rockchip,rk3399-qossyscon¶ÿ® :mpower-management@ff310000&rockchip,rk3399-pmusysconsimple-mfd¶ÿ1power-controller!rockchip,rk3399-power-controllerA+:power-domain@34¶"ÛáÝUgApower-domain@33¶!ÛÜåUhiApower-domain@31¶ÛëêUjApower-domain@32¶ ÛíìUklApower-domain@35¶#ÛÐUmApower-domain@25¶ÛlApower-domain@23¶ÛðUnApower-domain@22¶ÛÕfUoApower-domain@27¶ÛÎLUpApower-domain@28¶ÛîUqApower-domain@8¶Û~}Apower-domain@9¶ Û€Apower-domain@24¶ÛôUrsApower-domain@15¶A+power-domain@21¶ÛÞçrUtApower-domain@19¶ÛåßUuvApower-domain@20¶ÛæàUwxApower-domain@16¶A+power-domain@17¶ÛÙÙUyzApower-domain@18¶ÛÛÛU{Asyscon@ff320000)rockchip,rk3399-pmugrfsysconsimple-mfd¶ÿ2:io-domains&rockchip,rk3399-pmu-io-voltage-domainãokay\|spi@ff350000(rockchip,rk3399-spirockchip,rk3066-spi¶ÿ5Û}}×spiclkapb_pclkê<ûdefaultñ~€�+ ãdisabledserial@ff370000&rockchip,rk3399-uartsnps,dw-apb-uart¶ÿ7Û}}"×baudclkapb_pclkêfISûdefaultñ‚ ãdisabledi2c@ff3c0000rockchip,rk3399-i2c¶ÿ<t} ‡ ëÂÛ} } ×i2cpclkê9ûdefaultñƒ+ãokay €¨1pmic@1brockchip,rk808¶ =ê/xin32krk808-clkout2ûdefaultñ„kŒš…¦…²…¾…Ê…Ö…â†î…ú……†!:ÅregulatorsDCDC_REG1 .vdd_center=Qc q°{™p“qregulator-state-mem¨DCDC_REG2 .vdd_cpu_l=Qc q°{™p“q: regulator-state-mem¨DCDC_REG3.vcc_ddr=Qregulator-state-memÁDCDC_REG4.vcc_1v8=Qcw@{w@:regulator-state-memÁÙw@LDO_REG1.vcca1v8_codec=Qcw@{w@:’regulator-state-mem¨LDO_REG2 .vcca1v8_hdmi=Qcw@{w@:¯regulator-state-mem¨LDO_REG3 .vcca_1v8=Qcw@{w@regulator-state-memÁÙw@LDO_REG4 .vcc_sdio=Qc-ÆÀ{-ÆÀ:“regulator-state-memÁÙ-ÆÀLDO_REG5.vcca3v0_codec=Qc-ÆÀ{-ÆÀregulator-state-mem¨LDO_REG6.vcc_1v5=Qcã`{ã`regulator-state-memÁÙã`LDO_REG7 .vcca0v9_hdmi=Qc » { » :®regulator-state-mem¨LDO_REG8.vcc_3v0=Qc-ÆÀ{-ÆÀ:|regulator-state-memÁÙ-ÆÀSWITCH_REG1.vcc_cam=Qregulator-state-mem¨SWITCH_REG2 .vcc_mipi=Qregulator-state-mem¨regulator@40silergy,syr827¶@õûdefaultñ‡ .vdd_cpu_bc ß4{ã`“è=Q …:regulator-state-mem¨regulator@41silergy,syr828¶Aõûdefaultñˆ.vdd_gpuc ß4{ã`“è=Q …:¼regulator-state-mem¨i2c@ff3d0000rockchip,rk3399-i2c¶ÿ=t} ‡ ëÂÛ} } ×i2cpclkê8ûdefaultñ‰+ãokayX1i2c@ff3e0000rockchip,rk3399-i2c¶ÿ>t} ‡ ëÂÛ} } ×i2cpclkê:ûdefaultñŠ+ ãdisabledpwm@ff420000(rockchip,rk3399-pwmrockchip,rk3288-pwm¶ÿB ûdefaultñ‹Û} ãdisabledpwm@ff420010(rockchip,rk3399-pwmrockchip,rk3288-pwm¶ÿB ûdefaultñŒÛ} ãdisabledpwm@ff420020(rockchip,rk3399-pwmrockchip,rk3288-pwm¶ÿB  ûdefaultñ�Û}ãokay:Ïpwm@ff420030(rockchip,rk3399-pwmrockchip,rk3288-pwm¶ÿB0 ûdefaultñŽÛ} ãdisableddfi@ff630000¶ÿc@rockchip,rk3399-dfi»êƒÛy ×pclk_ddr_mon ãdisabled:video-codec@ff650000rockchip,rk3399-vpu¶ÿe êrq mvepuvdpuÛëê ×aclkhclk (�Niommu@ff650800rockchip,iommu¶ÿe@êsÛëê ×aclkiface /N:�video-codec@ff660000rockchip,rk3399-vdec¶ÿfêt Ûí쟞×axiahbcabaccore (�N iommu@ff660480rockchip,iommu ¶ÿf€@ÿfÀ@êuÛíì ×aclkifaceN  /:�iommu@ff670800rockchip,iommu¶ÿg@ê*ÛáÝ ×aclkiface / ãdisabledrga@ff680000rockchip,rk3399-rga¶ÿhê7ÛÜåm×aclkhclksclkËjgi ÒcoreaxiahbN!efuse@ff690000rockchip,rk3399-efuse¶ÿi€+Û} ×pclk_efusecpu-id@7¶cpu-leakage@17¶gpu-leakage@18¶center-leakage@19¶cpu-leakage@1a¶logic-leakage@1b¶wafer-info@1c¶dma-controller@ff6d0000arm,pl330arm,primecell¶ÿm@ ê < GÛÓ ×apb_pclk:[dma-controller@ff6e0000arm,pl330arm,primecell¶ÿn@ ê < GÛÔ ×apb_pclk:Jclock-controller@ff750000rockchip,rk3399-pmucru¶ÿuÛ‘×xin24m\/ ^t}‡(Jñ:}clock-controller@ff760000rockchip,rk3399-cru¶ÿvÛ‘×xin24m\/ ^ˆtÀÀ@ÂÁBÉÂCãÞxíD‡#g¸€/¯;šÊðÑ€xhÀ<4`õáõáúð€#ÃFõáúð€ׄׄ ë ëÂׄ:syscon@ff770000&rockchip,rk3399-grfsysconsimple-mfd¶ÿw+:io-domains"rockchip,rk3399-io-voltage-domainãokay k’ x| …| •“mipi-dphy-rx0rockchip,rk3399-mipi-dphy-rx0Ûw¥o×dphy-refdphy-cfggrfN ¢ ãdisabled:©usb2phy@e450rockchip,rk3399-usb2phy¶äPÛ{×phyclk/clk_usbphy0_480mãokay:.host-port ¢ê mlinestateãokay¨”:/otg-port ¢0êghjmotg-bvalidotg-idlinestateãokay:2usb2phy@e460rockchip,rk3399-usb2phy¶ä`Û|×phyclk/clk_usbphy1_480mãokay:0host-port ¢ê mlinestateãokay¨”:1otg-port ¢0êlmomotg-bvalidotg-idlinestateãokay:4phy@f780rockchip,rk3399-emmc-phy¶÷€$Û•×emmcclk ­2 ¢ãokay:-pcie-phyrockchip,rk3399-pcie-phyÛŠ×refclk ¢Ë‡Òphyãokay:phy@ff7c0000rockchip,rk3399-typec-phy¶ÿ|Û~}×tcpdcoretcpdphy-reft~‡úð€NË•”LÒuphyuphy-pipeuphy-tcphy\ãokaydp-port ¢:6usb3-port ¢:3phy@ff800000rockchip,rk3399-typec-phy¶ÿ€Û€×tcpdcoretcpdphy-reft€‡úð€N Ë�œMÒuphyuphy-pipeuphy-tcphy\ãokaydp-port ¢:7usb3-port ¢:5watchdog@ff848000 rockchip,rk3399-wdtsnps,dw-wdt¶ÿ„€Û|êxrktimer@ff850000rockchip,rk3399-timer¶ÿ…êQÛhZ ×pclktimerspdif@ff870000rockchip,rk3399-spdif¶ÿ‡êB`[etx ×mclkhclkÛU×ûdefaultñ–N¸ ãdisabledport:ÈendpointÉ—:Éi2s@ff880000(rockchip,rk3399-i2srockchip,rk3066-i2s¶ÿˆ\ê'`[[etxrx×i2s_clki2s_hclkÛVÔûbclk_onbclk_offñ˜å™N¸ãokay Á Ûport:Çendpoint öi2s Éš:>i2s@ff890000(rockchip,rk3399-i2srockchip,rk3066-i2s¶ÿ‰ê(`[[etxrx×i2s_clki2s_hclkÛWÕûdefaultñ›N¸ ãdisabled Û Ái2s@ff8a0000(rockchip,rk3399-i2srockchip,rk3066-i2s¶ÿŠê)`[[etxrx×i2s_clki2s_hclkÛXÖN¸ãokay:¬vop@ff8f0000rockchip,rk3399-vop-lit ¶ÿ� ÿ� êwtÛÛ‡ׄõáÛÛµÛ×aclk_vopdclk_vophclk_vop (œNË Òaxiahbdclkãokayport+:endpoint@0¶É�:µendpoint@1¶Éž:ºendpoint@2¶ÉŸ:³endpoint@3¶É :·endpoint@4¶É¡:9iommu@ff8f3f00rockchip,iommu¶ÿ�?êwÛÛÛ ×aclkifaceN /ãokay:œvop@ff900000rockchip,rk3399-vop-big ¶ÿ� ÿ� êvtÙÙ‡ׄõáÛÙ´Ù×aclk_vopdclk_vophclk_vop (¢NË Òaxiahbdclkãokayport+:endpoint@0¶É£:¹endpoint@1¶ɤ:´endpoint@2¶É¥:²endpoint@3¶ɦ:¶endpoint@4¶ɧ:8iommu@ff903f00rockchip,iommu¶ÿ�?êvÛÙÙ ×aclkifaceN /ãokay:¢isp0@ff910000rockchip,rk3399-cif-isp¶ÿ‘@ê+Ûnéã×ispaclkhclk (¨µ©ºdphyN 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Î:…vcc-0v9regulator-fixed.vcc_0v9=Qc » { »  †:vdd-logpwm-regulator ÎÏa¨ Ó….vdd_log=Qc 5{\Àopp-table-3operating-points-v2:opp00 Aׄ H » opp01 A'²Z€ H » opp02 A/¯ H » opp03 A7P( HH compatibleinterrupt-parent#address-cells#size-cellsmodelethernet0i2c0i2c1i2c2i2c3i2c4i2c5i2c6i2c7i2c8serial0serial1serial2serial3serial4mmc0mmc1cpudevice_typeregenable-methodcapacity-dmips-mhzclocks#cooling-cellsdynamic-power-coefficientcpu-idle-statesoperating-points-v2cpu-supplyphandleduration-usexit-latency-usentry-methodlocal-timer-stoparm,psci-suspend-paramentry-latency-usmin-residency-usportsrockchip,pmudevfreq-eventsclock-namesstatusinterruptsarm,no-tick-in-suspendclock-frequencyclock-output-names#clock-cellsreg-names#interrupt-cellsaspm-no-l0sbus-rangeinterrupt-namesinterrupt-map-maskinterrupt-mapmax-link-speedmsi-mapphysphy-namesrangesresetsreset-namesep-gpiosnum-lanespinctrl-0pinctrl-namesvpcie0v9-supplyvpcie1v8-supplyvpcie3v3-supplyinterrupt-controllerpower-domainsrockchip,grfsnps,txpblassigned-clocksassigned-clock-parentsclock_in_outphy-supplyphy-modesnps,reset-gpiosnps,reset-active-lowsnps,reset-delays-ustx_delayrx_delaymax-frequencyfifo-depthbus-widthcap-sdio-irqcap-sd-highspeedkeep-power-in-suspendmmc-pwrseqnon-removablesd-uhs-sdr104assigned-clock-ratescap-mmc-highspeedcd-gpiosdisable-wparasan,soc-ctl-syscondisable-cqe-dcmdmmc-hs400-1_8vmmc-hs400-enhanced-strobedr_modephy_typesnps,dis_enblslpm_quirksnps,dis-u2-freeclk-exists-quirksnps,dis_u2_susphy_quirksnps,dis-del-phy-power-chg-quirksnps,dis-tx-ipgap-linecheck-quirk#sound-dai-cellsremote-endpointmsi-controller#msi-cellsaffinity#io-channel-cellsvref-supplyi2c-scl-rising-time-nsi2c-scl-falling-time-nsreg-shiftreg-io-widthdmasdma-namespolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temppinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-moderockchip,hw-tshut-polarity#power-domain-cellspm_qospmu1830-supplyrockchip,system-power-controllerwakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyvcc10-supplyvcc11-supplyvcc12-supplyvddio-supplyregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-off-in-suspendregulator-on-in-suspendregulator-suspend-microvoltfcs,suspend-voltage-selectorvin-supply#pwm-cellsiommus#iommu-cells#dma-cellsarm,pl330-periph-burst#reset-cellsaudio-supplybt656-supplygpio1830-supplysdmmc-supply#phy-cellsdrive-impedance-ohmrockchip,capture-channelsrockchip,playback-channelsdai-formatmclk-fsrockchip,disable-mmu-resetsimple-audio-card,formatsimple-audio-card,mclk-fssimple-audio-card,namesound-daiavdd-0v9-supplyavdd-1v8-supplyddc-i2c-busmali-supplygpio-controller#gpio-cellsbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highoutput-lowinput-enablerockchip,pinsopp-sharedopp-hzopp-microvoltclock-latency-nsstdout-pathfunctioncolorlinux,default-triggerreset-gpioslabeldaishp-det-gpioenable-active-highpwmspwm-supply