#include <stdio.h>#include <stdlib.h>#include <string.h>#include <sys/types.h>#include <ctype.h>#include <unistd.h>#include "../../config.h"#include "arcbios.h"#include "cop0.h"#include "cpu.h"#include "cpu_mips.h"#include "debugger.h"#include "devices.h"#include "emul.h"#include "machine.h"#include "memory.h"#include "mips_cpu_types.h"#include "opcodes_mips.h"#include "settings.h"#include "symbol.h"#include "tmp_mips_head.cc"#include "memory_mips.cc"#include "tmp_mips_tail.cc"Go to the source code of this file.
Macros | |
| #define | DYNTRANS_DUALMODE_32 |
| #define | DYNTRANS_DELAYSLOT |
Functions | |
| void | mips_pc_to_pointers (struct cpu *) |
| void | mips32_pc_to_pointers (struct cpu *) |
| int | mips_cpu_new (struct cpu *cpu, struct memory *mem, struct machine *machine, int cpu_id, char *cpu_type_name) |
| void | mips_cpu_dumpinfo (struct cpu *cpu) |
| void | mips_cpu_list_available_types (void) |
| int | mips_cpu_instruction_has_delayslot (struct cpu *cpu, unsigned char *ib) |
| void | mips_cpu_tlbdump (struct machine *m, int x, int rawflag) |
| int | mips_cpu_disassemble_instr (struct cpu *cpu, unsigned char *originstr, int running, uint64_t dumpaddr) |
| void | mips_cpu_register_dump (struct cpu *cpu, int gprs, int coprocs) |
| void | mips_cpu_interrupt_assert (struct interrupt *interrupt) |
| void | mips_cpu_interrupt_deassert (struct interrupt *interrupt) |
| void | mips_cpu_exception (struct cpu *cpu, int exccode, int tlb, uint64_t vaddr, int coproc_nr, uint64_t vaddr_vpn2, int vaddr_asid, int x_64) |
| #define DYNTRANS_DELAYSLOT |
Definition at line 74 of file cpu_mips.cc.
| #define DYNTRANS_DUALMODE_32 |
Definition at line 73 of file cpu_mips.cc.
| void mips32_pc_to_pointers | ( | struct cpu * | ) |
| int mips_cpu_disassemble_instr | ( | struct cpu * | cpu, |
| unsigned char * | originstr, | ||
| int | running, | ||
| uint64_t | dumpaddr | ||
| ) |
Definition at line 701 of file cpu_mips.cc.
References addr, cpu::byte_order, cpu::cpu_id, debug, cpu::delay_slot, EMUL_BIG_ENDIAN, get_symbol_name(), HI6_SPECIAL, instr, cpu::is_32bit, cpu::machine, machine::ncpus, cpu::pc, SPECIAL_DSLL, SPECIAL_DSLL32, SPECIAL_DSRA, SPECIAL_DSRA32, SPECIAL_DSRL, SPECIAL_DSRL32, SPECIAL_SLL, SPECIAL_SRA, SPECIAL_SRL, and machine::symbol_context.
| void mips_cpu_dumpinfo | ( | struct cpu * | cpu | ) |
Definition at line 349 of file cpu_mips.cc.
References cpu::byte_order, cpu::cd, mips_cpu::cpu_type, debug, DEBUG_INDENTATION, debug_indentation(), EMUL_BIG_ENDIAN, cpu::is_32bit, mips_cpu_type_def::isa_level, mips_cpu_type_def::isa_revision, cpu::mips, mips_cpu_type_def::nr_of_tlb_entries, mips_cpu_type_def::pdcache, mips_cpu_type_def::pdlinesize, mips_cpu_type_def::pdways, mips_cpu_type_def::picache, mips_cpu_type_def::pilinesize, mips_cpu_type_def::piways, mips_cpu_type_def::scache, mips_cpu_type_def::slinesize, and mips_cpu_type_def::sways.
| void mips_cpu_exception | ( | struct cpu * | cpu, |
| int | exccode, | ||
| int | tlb, | ||
| uint64_t | vaddr, | ||
| int | coproc_nr, | ||
| uint64_t | vaddr_vpn2, | ||
| int | vaddr_asid, | ||
| int | x_64 | ||
| ) |
Definition at line 1719 of file cpu_mips.cc.
References cpu::cd, mips_cpu::coproc, cpu::cpu_id, mips_cpu::cpu_type, debug, mips_cpu_type_def::exc_model, get_symbol_name(), cpu::is_halted, cpu::machine, cpu::mips, machine::ncpus, cpu::pc, quiet_mode, reg, mips_coproc::reg, and machine::symbol_context.
Referenced by cop0_availability_check(), coproc_function(), MEMORY_RW(), TRANSLATE_ADDRESS(), and X().
| int mips_cpu_instruction_has_delayslot | ( | struct cpu * | cpu, |
| unsigned char * | ib | ||
| ) |
Definition at line 445 of file cpu_mips.cc.
References BE32_TO_HOST, cpu::byte_order, EMUL_LITTLE_ENDIAN, HI6_BEQ, HI6_BEQL, HI6_BGTZ, HI6_BGTZL, HI6_BLEZ, HI6_BLEZL, HI6_BNE, HI6_BNEL, HI6_J, HI6_JAL, HI6_REGIMM, HI6_SPECIAL, LE32_TO_HOST, REGIMM_BGEZ, REGIMM_BGEZAL, REGIMM_BGEZALL, REGIMM_BGEZL, REGIMM_BLTZ, REGIMM_BLTZAL, REGIMM_BLTZALL, REGIMM_BLTZL, SPECIAL_JALR, and SPECIAL_JR.
Referenced by mips_cpu_new().
| void mips_cpu_interrupt_assert | ( | struct interrupt * | interrupt | ) |
Definition at line 1692 of file cpu_mips.cc.
References cpu::cd, COP0_CAUSE, mips_cpu::coproc, interrupt::extra, interrupt::line, cpu::mips, and mips_coproc::reg.
Referenced by mips_cpu_new().
| void mips_cpu_interrupt_deassert | ( | struct interrupt * | interrupt | ) |
Definition at line 1697 of file cpu_mips.cc.
References cpu::cd, COP0_CAUSE, mips_cpu::coproc, interrupt::extra, interrupt::line, cpu::mips, and mips_coproc::reg.
Referenced by mips_cpu_new().
| void mips_cpu_list_available_types | ( | void | ) |
Definition at line 423 of file cpu_mips.cc.
References debug, MIPS_CPU_TYPE_DEFS, mips_cpu_type_def::name, and strlen().
| int mips_cpu_new | ( | struct cpu * | cpu, |
| struct memory * | mem, | ||
| struct machine * | machine, | ||
| int | cpu_id, | ||
| char * | cpu_type_name | ||
| ) |
Definition at line 89 of file cpu_mips.cc.
References cpu::byte_order, mips_cpu::cache, CACHE_DATA, CACHE_INSTRUCTION, mips_cpu::cache_last_paddr, mips_cpu::cache_linesize, mips_cpu::cache_mask, mips_cpu::cache_pdcache, mips_cpu::cache_pdcache_linesize, mips_cpu::cache_picache, mips_cpu::cache_picache_linesize, mips_cpu::cache_secondary, mips_cpu::cache_secondary_linesize, mips_cpu::cache_size, mips_cpu::cache_tags, cpu::cd, CHECK_ALLOCATION, COP0_STATUS, mips_cpu::coproc, CPU_SETTINGS_ADD_REGISTER64, mips_cpu::cpu_type, debug, DEFAULT_PCACHE_LINESIZE, DEFAULT_PCACHE_SIZE, EMUL_LITTLE_ENDIAN, interrupt::extra, mips_cpu::gpr, mips_cpu::hi, IMPOSSIBLE_PADDR, INITIAL_STACK_POINTER, cpu::instruction_has_delayslot, interrupt::interrupt_assert, INTERRUPT_CONNECT, interrupt::interrupt_deassert, interrupt_handler_register(), cpu::invalidate_code_translation, cpu::invalidate_translation_caches, mips_cpu::irq_compare, cpu::is_32bit, mips_cpu_type_def::isa_level, interrupt::line, mips_cpu::lo, cpu::machine, cpu::memory_rw, cpu::mips, mips32_invalidate_code_translation(), mips32_invalidate_translation_caches(), mips32_run_instr(), mips32_update_translation_table(), mips_coproc_new(), mips_cpu_instruction_has_delayslot(), mips_cpu_interrupt_assert(), mips_cpu_interrupt_deassert(), MIPS_CPU_TYPE_DEFS, MIPS_GPR_SP, mips_invalidate_code_translation(), mips_invalidate_translation_caches(), mips_memory_rw(), MIPS_R2000, MIPS_R3000, MIPS_R4100, mips_run_instr(), mips_update_translation_table(), MMU10K, MMU3K, MMU8K, mips_cpu_type_def::mmu_model, N_MIPS_GPRS, interrupt::name, mips_cpu_type_def::name, cpu::name, cpu::path, cpu::pc, mips_cpu_type_def::pdcache, mips_cpu_type_def::pdlinesize, mips_cpu_type_def::picache, mips_cpu_type_def::pilinesize, machine::prom_emulation, mips_coproc::reg, mips_cpu_type_def::rev, cpu::run_instr, mips_cpu_type_def::scache, mips_cpu_type_def::slinesize, STATUS_FR, STATUS_IM_SHIFT, store_32bit_word(), r3000_cache_line::tag_paddr, r3000_cache_line::tag_valid, cpu::translate_v2p, translate_v2p_generic(), translate_v2p_mmu10k(), translate_v2p_mmu3k(), translate_v2p_mmu4100(), translate_v2p_mmu8k(), and cpu::update_translation_table.
| void mips_cpu_register_dump | ( | struct cpu * | cpu, |
| int | gprs, | ||
| int | coprocs | ||
| ) |
Definition at line 1502 of file cpu_mips.cc.
References cpu::cd, cpu::cpu_id, mips_cpu::cpu_type, debug, get_symbol_name(), mips_cpu::hi, mips_cpu::hi1, cpu::is_32bit, mips_cpu::lo, mips_cpu::lo1, cpu::machine, cpu::mips, MIPS_GPR_ZERO, MIPS_R5900, cpu::pc, mips_cpu_type_def::rev, and machine::symbol_context.
| void mips_cpu_tlbdump | ( | struct machine * | m, |
| int | x, | ||
| int | rawflag | ||
| ) |
Definition at line 501 of file cpu_mips.cc.
References cpu::cd, COP0_INDEX, COP0_RANDOM, COP0_WIRED, mips_cpu::coproc, mips_cpu::cpu_type, machine::cpus, ENTRYHI_ASID, ENTRYLO_D, ENTRYLO_PFN_MASK, ENTRYLO_PFN_SHIFT, ENTRYLO_V, mips_tlb::hi, INDEX_MASK, cpu::is_32bit, mips_cpu_type_def::isa_level, mips_tlb::lo0, mips_tlb::lo1, mips_tlb::mask, cpu::mips, MIPS_R4100, MMU32, MMU3K, mips_cpu_type_def::mmu_model, machine::ncpus, R2K3K_ENTRYHI_ASID_MASK, R2K3K_ENTRYHI_ASID_SHIFT, R2K3K_ENTRYHI_VPN_MASK, R2K3K_ENTRYLO_D, R2K3K_ENTRYLO_G, R2K3K_ENTRYLO_N, R2K3K_ENTRYLO_PFN_MASK, R2K3K_ENTRYLO_V, R2K3K_INDEX_MASK, R2K3K_INDEX_SHIFT, R2K3K_RANDOM_MASK, R2K3K_RANDOM_SHIFT, RANDOM_MASK, mips_coproc::reg, mips_cpu_type_def::rev, TLB_G, and mips_coproc::tlbs.
| void mips_pc_to_pointers | ( | struct cpu * | ) |
1.8.13